Professor Josep Torrellas
Director, SRC/DARPA JUMP 2.0 ACE Center for Evolvable Computing
Saburo Muroga Professor of Computer Science, University of Illinois at Urbana-Champaign
(torrella@illinois.edu)
Google Scholar,
CV October 2024
Looking for Graduate Students:
The SRC/DARPA JUMP 2.0 ACE Center for Evolvable Computing is starting in January 2023. This 5-year 21-Principal Investigator project is focused on transforming distributed computing, substantially improving its energy efficiency and performance. See the Official Announcement, as well as the SRC announcements (here and here) and the
DARPA announcement. I am looking for graduate students who want to get involved in the Center. It is a great opportunity for individuals who are looking to learn and perform research on cross-disciplinary issues in computing systems, interact with students and senior researchers across the community, and have a close collaboration with computer industry leaders.
If interested, please send an email with your CV to torrella@illinois.edu.
Recent News (whole list at the News Tab):
NEW: August 2024: PhD student Zirui Neil Zhao graduated and will start as an Assistant Professor at the Department of Electrical and Computer Engineering, University of Texas at Austin. Check out his thesis "You Share, You Leak: Practical Side-channel Attacks and Defenses in Modern Clouds".NEW: August 2024: One paper is accepted in MICRO 2024.
NEW: March 2024: Josep Torrellas is awarded the 2023-2024 Tau Beta Pi Daniel C. Drucker Eminent Faculty Award, College of Engineering, UIUC.
NEW: March 2024: Two papers are accepted in ISCA 2024.
NEW: January 2024: Four Papers in 2024 IEEE Top Picks on Computer Architecture Conferences: One Top Pick (Micro-Armed Bandit: Lightweight & Reusable Reinforcement Learning for Microarchitecture Decision-Making) and Thee Honorable Mentions (μManycore: A Cloud-Native CPU for Tail at Scale; Untangle: A Principled Framework to Design Low-Leakage, High-Performance Dynamic Partitioning Schemes; SPADE: A Flexible and Scalable Accelerator for SpMM and SDDMM).
NEW: December 2023: Two papers are accepted in ASPLOS 2024.
NEW: November 2023: Two papers are accepted in HPCA 2024.
NEW: September 2023: One paper is accepted in MICRO 2023 and one in ASPLOS 2024.
NEW: March 2023: Three papers are accepted in ISCA 2023.
NEW: January 2023: One paper is accepted in ASPLOS 2023.
NEW: January 2023: Josep Torrellas is the Director of the SRC/DARPA JUMP 2.0 ACE Center for Evolvable Computing. See the Center Announcement, as well as the SRC announcements (here and here) and the DARPA announcement.
NEW: November 2022: One paper is accepted in PPoPP 2023.
NEW: October 2022: Two papers are accepted in HPCA 2023.
NEW: March 2022: One paper is accepted in ISCA 2022.
NEW: January 2022: Two papers are accepted in IEEE Top Picks in Computer Architecture 2022: Distributed Data Persistency (MICRO 21) and Maya: Using Formal Control to Obfuscate Power Side Channels (ISCA 21).
NEW: November 2021: Two papers are accepted in ASPLOS 2022.
NEW: September 2021: One paper is accepted in MICRO 2021.
NEW: May 2021: The SDO paper receives the First Place in the Inaugural Intel Hardware Security Academic Award.
NEW: May 2021: CSL article on the Draco System Call Security Software upstreaming to Linux v5.11.
NEW: April 2021: IBM-Illinois C3SR center article on our upstreaming of the Draco System Call Security Software to Linux v5.11.
NEW: March 2021: Two papers are accepted in ISCA 2021.
NEW: February 2021: Torrellas received the IEEE Computer Society 2021 Harry H. Goode Memorial Award, "For contributions to energy efficient and programmable shared-memory multiprocessor architectures.". Also see article from the Computer Science Department.
NEW: January 2021: One Paper (BabbleFish) in the 12-paper IEEE Micro 2021 Top Picks from Computer Architecture Conferences, plus one Honorable Mention (Elastic Cuckoo Page Tables).
NEW: December 2020: The upstreamed Draco is featured in Linux Security at Phoronix.
NEW: December 2020: Draco has been upstreamed in the Linux Kernel.
NEW: December 2020: One paper is accepted in HPCA 2021 and two papers in ASPLOS 2021.
NEW: August 2020: Raghavendra Pothukuchi graduated and will start as a Postdoctoral Researcher at Yale University with Prof. Abhishek Bhattacharjee.
NEW: August 2020: Dimitrios Skarlatos graduated and will start as an Assistant Professor in the CS Department at Carnegie Mellon University.
NEW: July 2020: Four papers are accepted in MICRO 2020.
NEW: July 2020: STT paper selected for Research Highlight, Communications of the ACM (CACM).
NEW: March 2020: Two papers are accepted in ISCA 2020.
NEW: March 2020: The University of Illinois Shines at ISCA 2019.
NEW: March 2020: Best Paper Award at ASPLOS 2020. Also see article from the Computer Science Department. Video of the talk "Elastic Cuckoo Page Tables: Rethinking Virtual Memory Translation for Parallelism".
NEW: March 2020: Video of the HPCA/PPoPP/CGO 2020 Keynote by Josep Torrellas on "Interdisciplinary Research at a Time of Pervasive Changes".
NEW: January 2020: Two Papers (MicroScope and STT) in the 12-paper IEEE Micro 2020 Top Picks from Computer Architecture Conferences, plus one Honorable Mention (Vertical Processors).
NEW: Two excellent Ph.D. students are graduating and looking for an academic job starting Fall 2019: Dimitrios Skarlatos, and Raghavendra Pothukuchi. Please check their resumes.
NEW: November 2019: One paper is accepted in ASPLOS 2020.
NEW: October 2019: Best Paper Award at MICRO 2019.
NEW: August 2019: Mengjia Yan graduated and will start as an Assistant Professor in the EECS Department at MIT.
NEW: August 2019: Two papers are accepted in MICRO 2019.
NEW: June 2019: One paper is accepted in SC 2019.
NEW: March 2019: Three papers are accepted in ISCA 2019.
NEW: February 2019: Two papers are accepted in PLDI 2019.
NEW: January 2019: InvisiSpec paper receives an Honorable Mention in the 2019 IEEE Micro's Top Picks from Computer Architecture Conferences.
NEW: December 2018: We published the Report on the NSF-sponsored Visioning Workshop on Inter-Disciplinary Research Challenges in Computer Systems.
NEW: November 2018: One paper is accepted in ASPLOS 2019.
NEW: November 2018: Two papers are accepted in HPCA 2019.
NEW: July 2018: A paper is accepted in MICRO 2018: InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy
The i-acoma Architecture Group,
led by Professor Josep Torrellas,
focuses on new processor, memory, and system technologies and organizations to build novel
multiprocessor computer architectures. Two examples of projects we have done in the past:
- A novel multicore architecture for programmability:
The Bulk Multicore Architecture (Communications of the ACM, December 2009). [Presentation slides].
EE Times article that discusses the Bulk Multicore.
Dr. Dobb's Journal discussion of the Bulk Multicore.
Making Parallel Programming Easy: Research Contributions from Illinois, a book summarizing the accomplishments of the Illinois-Intel Parallelism Center (I2PC).
This project is funded by Intel under the Illinois Intel Parallelism Center (I2PC). - An extreme-scale multiprocessor architecture designed from the
ground up for energy and power efficiency:
Thrifty: An Extreme-Scale Multiprocessor Architecture (IEEE Computer, November 2009). [Presentation slides].
Extreme-Scale Computer Architecture: Energy Efficiency from the Ground Up (DATE, March 2014).
This work is part of an Intel-lead DARPA project that aims to design an Extreme-Scale computer.
Intel blog on the DARPA project.
This project is funded by DARPA under UHPC and DOE.
Examples of Architectures We Designed in the Past:
- "QuickRec: A Hardware Prototype for Recording and Deterministically Replaying Multithreaded Programs in the Intel Architecture". This prototype has been developed in collaboration with Intel, and is described in the QuickRec ISCA-2013 paper.
- "Runnemede: An Chip Multiprocessor for Extreme-Scale Computing". This manycore chip has been designed in collaboration with Intel, and is described in the Runnemede HPCA-2013 paper.
The emphasis research areas in the group are:
- Multiprocessor organization and system design
- Speculative multithreading
- Hardware reliability and variability
- Support for software reliability
- Low-power design
- Old Projects
We have released these software tools:
- VARIUS: A model of within-die process variation and resulting timing errors in processors for microarchitects.
- SESC: A cycle accurate architectural simulator that models a very wide set of architectures: superscalars, multiprocessors, processors in memory, and thread-level speculation.
Our research is funded by NSF, DARPA, and DOE.