I am a PhD. student
within the computer science department at the
University of Illinois,
Urbana-Champaign, where I work in the
I-ACOMA group led by my PhD. advisor
Prof. Josep Torrellas.
I graduated from the
Indian Institute of Technology (IIT), Kanpur
with a BTech. in computer science and engineering in 2003. Immediately following, I
enrolled as a graduate student at the
Department of Computer Science at
UIUC, and earned a M.S. in May 2005.
I will be graduating in August 2008. I am looking for exciting and
challenging job opportunities. Please feel free to take a look
at my resume.
Computer architecture, Multicore architecture, Reliability, Technology scaling issues, Process variation, Aging, Design defects, Machine learning, Data integration
In the news...
- Smruti R. Sarangi, Brian Greskamp, Radu Teodorescu, Jun Nakano, Abhishek Tiwari, and Josep Torrellas.
VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects,
IEEE Transactions on Semiconductor Manufacturing (IEEE TSM), February 2008 (25 pages)
- Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Josep Torrellas
Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing,
40th International Symposium on Microarchitecture (MICRO), December 2007
(12 pages, 20% acceptance rate)
- Abhishek Tiwari, Smruti Sarangi and Josep Torrellas
ReCycle: Pipeline Adaptation to Tolerate Process Variation
34th Annual International
Symposium on Computer Architecture (ISCA), June 2007 (12 pages, 23% acceptance rate)
- Radu Teodorescu, Brian Greskamp, Jun Nakano, Smruti R. Sarangi, Abhishek Tiwari and Josep Torrellas
VARIUS: A Model of Parameter Variation and Resulting Timing Errors for Microarchitects
Workshop on Architectural Support for Gigascale Integration (ASGI),
in conjunction with ISCA, June 2007 (9 pages)
- Smruti Sarangi, Satish Narayanasamy, Bruce Carneal, Abhishek Tiwari, Brad
Calder and Josep Torrellas
Patching Processor Design Errors with Programmable
IEEE Micro Special Issue: MICRO's Top Picks from Computer
Architecture Conferences, January-February 2007. (14 pages, 14% acceptance rate)
- Smruti Sarangi, Abhishek Tiwari and Josep Torrellas
Phoenix: Detecting and
Recovering from Permanent Processor Design Bugs with Programmable
39th Annual International Symposium on Microarchitecture (MICRO), December
2006. (12 pages, 24% acceptance rate) Best
Thomas M. Siebel Center for Computer Science
201 N. Goodwin Ave.
Urbana, IL 61801