Josep Torrellas
Saburo Muroga Professor of Computer Science
University of Illinois at Urbana-Champaign
( Google Scholar

NEW: February 2019: Two papers are accepted in PLDI 2019.
NEW: January 2019: InvisiSpec paper receives an Honorable Mention in the 2019 IEEE Micro's Top Picks from Computer Architecture Conferences.
NEW: Two excellent Ph.D. students are graduating and looking for an academic job starting Fall 2019: Mengjia Yan, and Raghavendra Pothukuchi. Please check their resumes.
NEW: December 2018: We published the Report on the NSF-sponsored Visioning Workshop on Inter-Disciplinary Research Challenges in Computer Systems.
NEW: November 2018: One paper is accepted in ASPLOS 2019.
NEW: November 2018: Two papers are accepted in HPCA 2019.
NEW: August 2018: Received an Intel Strategic Research Alliance (ISRA) grant to work on InvisiSpec.
NEW: July 2018: A paper is accepted in MICRO 2018: InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy

Josep Torrellas is the Saburo Muroga Professor of Computer Science at the University of Illinois at Urbana-Champaign (UIUC). He is the Director of the Center for Programmable Extreme Scale Computing, and past Director of the Illinois-Intel Parallelism Center (I2PC). He is a Fellow of IEEE (2004), ACM (2010), and AAAS (2016). He received the IEEE Computer Society 2015 Technical Achievement Award, for "Pioneering contributions to shared-memory multiprocessor architectures and thread-level speculation", and the 2017 UIUC Campus Award for Excellence in Graduate Student Mentoring. He is a member of the Computing Research Association (CRA) Board of Directors. He has served as the Chair of the IEEE Technical Committee on Computer Architecture (TCCA) (2005-2010) and as a Council Member of CRA’s Computing Community Consortium (CCC) (2011-2014). He was a Willett Faculty Scholar at UIUC (2002-2009). As of 2016, he has graduated 36 Ph.D. students, who are now leaders in academia and industry. He received a Ph.D. from Stanford University.

Biography of Josep Torrellas.

Torrellas leads The i-acoma Architecture Group, which focuses on new processor, memory, and system technologies and organizations to build novel multiprocessor computer architectures. The two main projects are:

Recent Designed Architectures:

Recent News:

Some Recent Publications:

Software Released:

  • VARIUS and VARIUS-NTV: A model of within-die process variation and resulting timing errors in manycores for microarchitects.
  • SESC: A cycle accurate architectural simulator that models a very wide set of architectures: superscalars, multiprocessors, processors in memory, and thread-level speculation.

Emphasis Research Areas:

The main emphasis research areas in the group are:

Currently Teaching:

CS533: Parallel Computer Architectures.

Contact Information

Josep Torrellas
4231 Thomas M. Siebel Center for Computer Science.
University of Illinois.
201 N. Goodwin Ave.
Urbana, IL. 61801.
Phone (217) 244-4148, fax 217-265-6582.

Administrative Assistant

Dana Garard,
Thomas M. Siebel Center for Computer Science.
University of Illinois.
201 N. Goodwin Ave.
Urbana, IL. 61801.
Phone (217) 333-2234, fax 217-244-1089.

Our research is funded by NSF, DARPA, and DOE.