Josep Torrellas (torrella at illinois.edu)
NEW:Our group has 2 papers in ISCA-2013, 3 papers in ASPLOS-2013 and 4 papers in HPCA-2013.
NEW: We have 2 excellent researchers who are now looking for an academic/research job starting Fall 2013: Xuehai Qian, and Amin Ansari .
Josep Torrellas is a Professor at the Departments of Computer Science and (by courtesy) Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. He is the Director of the Center for Programmable Extreme Scale Computing, and the Director of the Illinois-Intel Parallelism Center (I2PC). He is a Fellow of IEEE (2004) and ACM (2010). He was a Willett Faculty Scholar at UIUC (2002-2009) and the Chair of the IEEE Technical Committee on Computer Architecture (2005-2010). As of 2012, he has graduated 30 Ph.D. students, who are now leaders in academia and industry.
Torrellas leads The i-acoma Architecture Group, which focuses on new processor, memory, and system technologies and organizations to build novel multiprocessor computer architectures. The two main projects are:
- A novel multicore architecture for programmability:
The Bulk Multicore Architecture (Communications of the ACM,
EE Times article that discusses the Bulk Multicore.
Dr. Dobb's Journal discussion of the Bulk Multicore.
This project is funded under the Illinois Intel Parallelism Center (I2PC).
- An extreme-scale multiprocessor architecture designed from the
ground up for energy and power efficiency:
Thrifty: An Extreme-Scale Multiprocessor Architecture
(IEEE Computer, November 2009).
This work is part of an Intel-lead DARPA project that aims to design an Extreme-Scale computer.
Intel blog on the DARPA project.
This project is funded by DARPA under UHPC and DOE.
- June 2013: Torrellas gives a Keynote Address at the International Conference on Application-Specific Systems, Architectures and Processors (ASAP) on "Extreme Scale Computer Architecture: Energy Efficiency from the Ground Up".
- June 2013: Torrellas will be the Program Chair of the International Conference on Parallel Architectures and Compilation Techniques (PACT), in Edmonton, Alberta, August 2014.
- March 2013: Our group has 2 papers in ISCA-2013.
- November 2012: Our group has 3 papers in ASPLOS-2013.
- November 2012: Our group has 4 papers in HPCA-2013.
- October 2012: Josep Torrellas receives the High-Impact Paper Award at the International Conference on Computer Design (ICCD), for "one of the 5 most cited papers in the first 30 years of ICCD (1983-2012)" for the paper "FlexRAM: Toward an Advanced Intelligent Memory System", ICCD 1999. Here is an article about the award.
- October 2012: Josep Torrellas, Nam Sung Kim (Univ. of Wisconsin) and Radu Teodorescu (Ohio State Univ.) receive a DARPA PERFECT Award of $2.8M over 5.5 years to improve the power efficiency of embedded systems.
- September 2012: A new paper on architecture for detecting sequential consistency violations will appear in MICRO-2012. Here is an article about the paper. Here is a video of a presentation.
- June 2012: Our PhD students Ulya Karpuzcu and Abdullah Muzahid are starting in the Fall 2012 as Assistant Professors at University of Minnesota and University of Texas San Antonio, respectively. Here is an I2PC article about them.
- June 2012: We released VARIUS-NTV: A model of within-die process variation for Near Threshold Voltage Computing and resulting timing errors in manycores for microarchitects.
- May 2012: Torrellas is a co-author of 21st Century Computer Architecture, A Community White Paper.
- November 2011: Our research group has three papers accepted at the International Symposium on High Performance Computer Architecture (HPCA), New Orleans, LA, February 2012.
- July 2011: Josep Torrellas is the Program Chair of ISCA-2012 (Call for Papers).
- June 2011: Josep Torrellas will moderate a panel on "Broadening Computer Architecture Research: Embracing New Areas to Keep the Field Vibrant" at the International Symposium on Computer Architecture (ISCA), San Jose, CA, June 2011 .
- April 2011: Abdullah Muzahid, one of the graduate students in our group, has been awarded an Intel PhD Fellowship and a Mavis Future Faculty Fellows (MF3) award (an award to facilitate the training of the next generation of great engineering professors).
- February 2011: Our research group has two papers accepted at the International Symposium on Computer Architecture (ISCA), San Jose, CA, June 2011 .
- December 2010: Josep Torrellas is named ACM Fellow.
- October 2010: We released Failure is not an Option: Popular Parallel Programming, the report from the First Workshop on Advancing Computer Architecture Research (ACAR-1), which was sponsored by the Computing Community Consortium (CCC). [Summary slides]. More information can be obtained from http://iacoma.cs.uiuc.edu/acar1.
Some Recent Publications:
- QuickRec: Prototyping an Intel Architecture Extension for Record and Replay of Multithreaded Programs, ISCA, June 2013. [Presentation slides]
- WeeFence: Toward Making Fences Free in TSO, ISCA, June 2013. [Presentation slides]
- DeAliaser: Alias Speculation Using Atomic Region Support, ASPLOS, March 2013. [Presentation slides]
- Cyrus: Unintrusive Application-Level Record-Replay for Replay Parallelism, ASPLOS, March 2013. [Presentation slides]
- Volition: Scalable and Precise Sequential Consistency Violation Detection, ASPLOS, March 2013. [Presentation slides]
- Runnemede: An Architecture for Ubiquitous High-Performance Computing, HPCA, February 2013. [Presentation slides]
- EnergySmart: Toward Energy-Efficient Manycores for Near-Threshold Computing, HPCA, February 2013. [Presentation slides]
- Refrint: Intelligent Refresh to Minimize Power in On-Chip Multiprocessor Cache Hierarchies , HPCA, February 2013. [Presentation slides]
- Illusionist: Transforming Lightweight Cores into Aggressive Cores on Demand, HPCA, February 2013. [Presentation slides]
- Vulcan: Hardware Support for Detecting Sequential Consistency Violations Dynamically, MICRO, December 2012. [Video of a presentation at UIUC]. [Presentation slides]
- FlexRAM: Toward an Advanced Intelligent Memory System. A Retrospective Paper, ICCD, September 2012. [Presentation slides]
- 21st Century Computer Architecture, A Community White Paper, May 2012. [Presentation slides]
- VARIUS-NTV: A Microarchitectural Model to Capture the Increased Sensitivity of Manycores to Process Variations at Near-Threshold Voltages, DSN, June 2012. [Presentation slides]
- VARIUS and VARIUS-NTV: A model of within-die process variation and resulting timing errors in manycores for microarchitects.
- SESC: A cycle accurate architectural simulator that models a very wide set of architectures: superscalars, multiprocessors, processors in memory, and thread-level speculation.
Emphasis Research Areas:
The main emphasis research areas in the group are:
- Multiprocessor organization and system design
- Speculative multithreading
- Hardware reliability and variability
- Support for software reliability
- Low-power design
- Old Projects
Currently Teaching:CS533: Parallel Computer Architectures.
Contact InformationJosep Torrellas
4231 Thomas M. Siebel Center for Computer Science.
University of Illinois.
201 N. Goodwin Ave.
Urbana, IL. 61801.
Phone (217) 244-4148, fax 217-265-6582.
Administrative AssistantSherry Unkraut,
Thomas M. Siebel Center for Computer Science.
University of Illinois.
201 N. Goodwin Ave.
Urbana, IL. 61801.
Phone (217) 244-6621, fax 217-265-6582.