Professor Josep Torrellas
Saburo Muroga Professor of Computer Science
University of Illinois at Urbana-Champaign
(torrella@illinois.edu) Google Scholar, CV June 2021


Recent News (whole list at the News Tab):

NEW: May 2021: The SDO paper receives the First Place in the Inaugural Intel Hardware Security Academic Award.
NEW: May 2021: CSL article on the Draco System Call Security Software upstreaming to Linux v5.11.
NEW: April 2021: IBM-Illinois C3SR center article on our upstreaming of the Draco System Call Security Software to Linux v5.11.
NEW: March 2021: Two papers are accepted in ISCA 2021.
NEW: February 2021: Torrellas received the IEEE Computer Society 2021 Harry H. Goode Memorial Award, "For contributions to energy efficient and programmable shared-memory multiprocessor architectures.". Also see article from the Computer Science Department.
NEW: January 2021: One Paper (BabbleFish) in the 12-paper IEEE Micro 2021 Top Picks from Computer Architecture Conferences, plus one Honorable Mention (Elastic Cuckoo Page Tables).
NEW: December 2020: The upstreamed Draco is featured in Linux Security at Phoronix.
NEW: December 2020: Draco has been upstreamed in the Linux Kernel.
NEW: December 2020: One paper is accepted in HPCA 2021 and two papers in ASPLOS 2021.
NEW: August 2020: Raghavendra Pothukuchi graduated and will start as a Postdoctoral Researcher at Yale University with Prof. Abhishek Bhattacharjee.
NEW: August 2020: Dimitrios Skarlatos graduated and will start as an Assistant Professor in the CS Department at Carnegie Mellon University.
NEW: July 2020: Four papers are accepted in MICRO 2020.
NEW: July 2020: STT paper selected for Research Highlight, Communications of the ACM (CACM).
NEW: March 2020: Two papers are accepted in ISCA 2020.
NEW: March 2020: The University of Illinois Shines at ISCA 2019.
NEW: March 2020: Best Paper Award at ASPLOS 2020. Also see article from the Computer Science Department. Video of the talk "Elastic Cuckoo Page Tables: Rethinking Virtual Memory Translation for Parallelism".
NEW: March 2020: Video of the HPCA/PPoPP/CGO 2020 Keynote by Josep Torrellas on "Interdisciplinary Research at a Time of Pervasive Changes".
NEW: January 2020: Two Papers (MicroScope and STT) in the 12-paper IEEE Micro 2020 Top Picks from Computer Architecture Conferences, plus one Honorable Mention (Vertical Processors).
NEW: Two excellent Ph.D. students are graduating and looking for an academic job starting Fall 2019: Dimitrios Skarlatos, and Raghavendra Pothukuchi. Please check their resumes.
NEW: November 2019: One paper is accepted in ASPLOS 2020.
NEW: October 2019: Best Paper Award at MICRO 2019.
NEW: August 2019: Mengjia Yan graduated and will start as an Assistant Professor in the EECS Department at MIT.
NEW: August 2019: Two papers are accepted in MICRO 2019.
NEW: June 2019: One paper is accepted in SC 2019.
NEW: March 2019: Three papers are accepted in ISCA 2019.
NEW: February 2019: Two papers are accepted in PLDI 2019.
NEW: January 2019: InvisiSpec paper receives an Honorable Mention in the 2019 IEEE Micro's Top Picks from Computer Architecture Conferences.
NEW: December 2018: We published the Report on the NSF-sponsored Visioning Workshop on Inter-Disciplinary Research Challenges in Computer Systems.
NEW: November 2018: One paper is accepted in ASPLOS 2019.
NEW: November 2018: Two papers are accepted in HPCA 2019.
NEW: July 2018: A paper is accepted in MICRO 2018: InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy


The i-acoma Architecture Group, led by Professor Josep Torrellas, focuses on new processor, memory, and system technologies and organizations to build novel multiprocessor computer architectures. Two examples of projects we have done in the past:

Examples of Architectures We Designed in the Past:

The emphasis research areas in the group are:

We have released these software tools:

  • VARIUS: A model of within-die process variation and resulting timing errors in processors for microarchitects.
  • SESC: A cycle accurate architectural simulator that models a very wide set of architectures: superscalars, multiprocessors, processors in memory, and thread-level speculation.

Our research is funded by NSF, DARPA, and DOE.